Tutorials

Notes and write-ups on RTL design and verification — the things I wish someone had explained to me plainly the first time.

Jul 19, 2026 Using unique and priority to Prevent Latches

SystemVerilogRTL

Jul 19, 2026 Controlling Logic Flow with unique and priority

SystemVerilogVerification

Jul 19, 2026 Stop Using always: A Guide to Modern SystemVerilog Blocks

SystemVerilogRTL

Reference Guides

External write-ups and references for getting started with Verilog and hardware design.

• Data Types in Verilog HDL — a primer on Verilog data types, essential for anyone working with hardware description languages.
• Code Questions on Data Types — exercises to test your understanding of Verilog data types.
• Icarus Verilog + GTKWave Guide — how to simulate and visualize Verilog designs with Icarus Verilog and GTKWave.
• OpenRAM Configuration for 4kB SRAM using sky130 — configuring OpenRAM to generate an SRAM macro on the sky130 PDK.
• Memory maps for engineering concepts: Antennas, Computer Networks, Cryptography, Modern Communication, Evolution of Semiconductors, Microwave Devices